Frederic Reblewski
Chief Executive Officer & Co-Founder

Frederic Reblewski is the co-founder of M2000 with Olivier Lepape. Before M2000, he was the CEO of Meta Systems he also co-founded with Olivier. After the acquisition of Meta Systems he was the General Manager of Mentor's Hardware Emulation Division where he grew the organization and delivered several successful generations of emulators.

Before Meta Systems Frederic had also co-founded Dune Technology, a start-up involved with multi-processor, Unix compatible, real time OS as well as hardware acceleration.

Before Dune, Frederic was Deputy VP of R&D at Matra Data Systems, where he was in charge of developing array processor architecures applied to artificial intelligence.

Frederic started his career at Bull Systems and worked in the development of super computer architecures.

Frederic holds a BSEE from ISEP, Paris.

Olivier Lepape
Vice President Engineering & Co-Founder

Olivier Lepape is co-founder of M2000 with Frederic Reblewski. Before starting M2000, he was co-founder and Vice President of Engineering of Meta Systems, later acquired by Mentor Graphics where was in charge of all hardware and software development of ASIC emulator products.

Before Meta Systems Olivier was at Dune Technology, also a logic emulation company where he developed the first proprietary FPGA architecture based on hierarchical switching networks as well as place & route algorithms.

Olivier started his career at Matra Data Systems, then moved on the ES2 (a European ASIC foundry) where he was a custom IC designer.

Olivier holds a BSEE from Ecole Superieure d'Electricite (Supelec) de Paris and an MSEE from Stanford University.

Thomas Daniel
Vice President Software Engineering

Before joining M2000, Thomas started and led R&D efforts of analog and custom design platform development at Synopsys. Prior to Synopsys, he was Vice President of Engineering at Monterey Design, responsible for the company place and route and floorplanning tools.

Before Monterey Design, Thomas spent twelve years at LSI Logic where he started as ASIC Design Center Manager in Paris, and most recently was Vice President of ASIC Technology in Milpitas, CA, managing the central R&D group.

Thomas started his career at the CNRS (National Center for Scientific
Research) in Paris as a research engineer, then moved to Servovision (a division of Allen Bradley) where he led the development of several ASIC designs for imaging.

Thomas holds an MSEE from the University of Warsaw, Poland and a Ph.D.
from the University of Paris XI, Orsay in image processing.

Ali Erdengiz
Vice President Marketing

Prior to joining M2000, Ali was at Altera Corp. as Senior Director HardCopy Business Operations. In this role, Ali established the HardCopy strategy and built the development and marketing teams that introduced the most sucessful structured ASIC product to date.

Before Altera, Ali held various management positions in marketing and product development at Fujitsu Microelectronics USA, National Semiconductor and Fairchild Semiconductor, covering a wide variety of applications such as networking and consumer products as well as ASICs.

Ali started his career at Thomson-CSF Microwave Components Division as an R&D engineer in very-high speed GaAs LSI's.

Ali holds a BSEE from ESME-Sudria, Paris, an MSEE from Universite Paris XI, Orsay and an MBA from San Jose State University.

Gabriele Pulini
Vice President Sales & Business Development

Before joining M2000 Gabriele was at Mentor Graphics for nine years in various marketing positions, and most recently as Worlwide Marketing Director of the ASIC Hardware Emulation Product Line, Meta Systems in France.

Prior to Mentor, Gabriele was at Teradyne Europe first as a test product specialist for board test equipment, then as Sales Manager for Italy.

Gabriele started his career at Telettra, MIlan, later aquired by Alcatel, as a resarch engineer in digital communications.

Gabriele hold a BSEE from the University of Florence.

Carl Ebeling
Chief Technology Officer

Carl Ebeling has been a Professor of Computer Science and Engineering at the University of Washington since 1986. He has done extensive research in CAD for VLSI and FPGAs, including the Gemini LVS algorithm, the Triptych FPGA architecture,and the Pathfinder FPGA routing algorithm. His Ph.D. thesis involved building the Hitech chess machine, which included a dynamically reconfigurable evaluation function using very large lookup tables.

He has served as program chair for the Conference on Advanced Research in VLSI and the International Symposium on FPGAs.

Carl has a B.S. in Physics from Wheaton College, and a Ph.D. in Computer Science from Carnegie-Mellon University.